DM9106 データシートの表示（PDF） - Davicom Semiconductor, Inc.

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DM9106

10/100 Mbps 3-port Ethernet Switch Controller with PCI Interface

Davicom Semiconductor, Inc. 

DM9106

3-port switch with PCI Interface

6. Register Set

6.1 PCI Configuration Registers

The definitions of PCI Configuration Registers are based on

the PCI specification revision 2.2 and it provides the

initialization and configuration information to operate the PCI

interface in the DM9106. All registers can be accessed with

byte, word, or double word mode. As defined in PCI

specification 2.1, read accesses to reserve or

unimplemented registers will return a value of “0.” These

registers are to be described in the following sections.

The default value of PCI configuration registers after reset.

Description

Identifier

Identification

PCIID

Command & Status

PCICS

Revision

PCIRV

Miscellaneous

PCILT

I/O Base Address

PCIIO

Memory Base Address

PCIMEM

Reserved

--------

Subsystem Identification

PCISID

Reserved

--------

Capabilities Pointer

Cap _Ptr

Reserved

--------

Interrupt & Latency

PCIINT

Device Specific Configuration Register PCIUSR

Power Management Register

PCIPMR

Power Management Control & Status PMCSR

* It is written to 02100007H by most BIOS.

** It may be changed from EEPROM in application.

Address Offset

00H

04H

08H

0CH

10H

14H

18H - 28H

2CH

30H

34H

38H

3CH

40H

50H

54H

Value of Reset

1282H

02100000H*

02000021H

BIOS determine

System allocate

System allocate

00000000H

load from EEPROM

00000000H

00000050H

00000000H

System allocate bit7~0

00000000H**

C0310001H**

00000100H

Key to Default

In the register description that follows, the default column

takes the form <Reset Value>

Where:

<Reset Value>:

1

Bit set to logic one

0

Bit set to logic zero

X

No default value

<Access Type>:

RO = Read only

RW = Read/Write

R/C: means Read / Write & Write "1" for Clear.

18

Preliminary datasheet

DM9106-DS-P01

July 9, 2009

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