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DM9106 データシートの表示(PDF) - Davicom Semiconductor, Inc.

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DM9106 Datasheet PDF : 92 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
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96
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98
5.7 Miscellaneous Pins
Pin No.
53
76
77
78
5.8 Power Pins
Pin No.
4,18,32,40,48,62,75,100
24,57,120
11,21,27,35,45,
54,69,103,125
86,94,99
79,87
82,83,90,91
BGRES
BGGND
VCNTL
VREF
DM9106
3-port switch with PCI Interface
These two pins are the Twisted Pair receive in MDI
mode or transmit in MDIX mode.
I/O Bandgap Pin
Connect a 1.4K resistor to BGGND in application.
P Bandgap Ground
I/O 1.8V Voltage control
O Voltage Reference
Connect a 0.1u capacitor to ground in application.
Pin Name
PWRST#
TEST1
TEST2
TEST3
I/O
Description
I Power on Reset
Low active with minimum 1ms
I,PD Tie to high in application
I,PD 0: 3-port mode
All ports are active in this mode.
1: 2-port mode
Only 2 ports are active in this mode. Port 1 or port 2
can be disabled by strap TXEN2. In this mode, the
memory resource is shared by PCI bus port and the
other 2 ports.
I,PD Tie to ground in application
Pin Name
VCC3
VCCI
GND
AVDD3
AVDDI
AGND
I/O
Description
P Digital 3.3V
P Internal 1.8V core power
P Digital GND
P Analog 3.3V power
P Analog 1.8V power
P Analog GND
Preliminary datasheet
15
DM9106-DS-P01
July 9, 2009

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