DM9016 データシートの表示（PDF） - Davicom Semiconductor, Inc.

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DM9016

10/100 Mbps 3-port Ethernet Switch Controller with General Processor Interface

Davicom Semiconductor, Inc. 

DM9016

3-port switch with Processor Interface

6.62 Snooping Control Register 2 (79H)............................................................................................................ 38

6.63 Snooping Control Register 3 (7AH) ........................................................................................................... 38

6.64 Snooping Control Register 4 (7BH) ........................................................................................................... 38

6.65 Snooping Control Register 5 (7CH) ........................................................................................................... 38

6.66 MIB counter Port Index Register (80H)...................................................................................................... 39

6.67 MIB counter Data Register (81H~84H)....................................................................................................... 39

6.68 Per Port RX Packet Length Control Register (88H) ................................................................................. 39

6.69 Port-based VLAN mapping table Registers (B0H~BFH).......................................................................... 40

6.70 TOS Priority Map Registers (C0H~CFH).................................................................................................... 40

6.71 VLAN Priority Map Registers (D0H~D1H) ................................................................................................. 43

6.72 Memory Data Pre-Fetch Read Command without Address Increment Register (F0H) ........................ 43

6.73 Memory Data Read Command with Address Increment Register (F2H)................................................ 43

6.74 Memory Data Read address Register (F4H).............................................................................................. 43

6.75 Memory Data Read address Register (F5H).............................................................................................. 43

6.76 Memory Data Write Command without Address Increment Register (F6H).......................................... 44

6.77 Memory Data Write Command with Address Increment Register (F8H) ............................................... 44

6.78 Memory Data Write address Register (FAH)............................................................................................. 44

6.79 Memory Data Write address Register (FBH)............................................................................................. 44

6.80 TX Packet Length Register (FCH~FDH) .................................................................................................... 44

6.81 Interrupt Status Register (FEH).................................................................................................................. 44

6.82 Interrupt Mask Register (FFH).................................................................................................................... 44

6

Preliminary datasheet

DM9016-13-DS-P01

March 26, 2009

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