HM62256B Series
Write Timing Waveform (2) (OE Low Fixed) (OE = VIL)
Address
CS
WE
Dout
Din
t WC
Valid address
t CW
t WR
*1
t AW
tWP
tAS
tWHZ
High impedance
t OH
t OW
*2
*3
t DW tDH
*4
Valid data
Notes: 1. If CS goes low simultaneously with WE going low or after WE going low,
the outputs remain in the high impedance state.
2. Dout is the same phase of the write data of this write cycle.
3. Dout is the read data of next address.
4. If CS is low during this period, I/O pins are in the output state. Therefore, the input
signals of theopposite phase to the output must not be applied to them.
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