CY7C1326F データシートの表示（PDF） - Cypress Semiconductor
部品番号
コンポーネント説明
一致するリスト
CY7C1326F Datasheet PDF : 15 Pages
| |||
CY7C1326F
Switching Waveforms
Read Cycle Timing[17]
tCYC
CLK
ADSP
ADSC
ADDRESS
GW, BWE,
BW[A:B]
CE
ADV
OE
Data Out (Q)
tCH tCL
t
ADS
tADH
tADS tADH
tAS tAH
A1
A2
tWES tWEH
A3
Burst continued with
new base address
tCES tCEH
Deselect
cycle
tADVS tADVH
tCLZ
High-Z
tCO
tOEHZ
Q(A1)
Single READ
ADV
suspends
burst.
tOEV
tCO
tOELZ
tDOH
Q(A2) Q(A2 + 1)
Q(A2 + 2)
Q(A2 + 3)
BURST READ
tCHZ
Q(A2) Q(A2 + 1)
Burst wraps around
to its initial state
DON’T CARE UNDEFINED
Note:
17. On this diagram, when CE is LOW, CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH, CE1 is HIGH or CE2 is LOW or CE3 is HIGH.
Document #: 38-05424 Rev. **
Page 10 of 15
Share Link: 