CY2220 データシートの表示（PDF） - Cypress Semiconductor
部品番号
コンポーネント説明
一致するリスト
CY2220
Cypress Semiconductor
CY2220 Datasheet PDF : 11 Pages
| |||
CY2220
Pin Summary
Name
Pins
Description
VSSREF
VDDREF
VSSPCI
VDDPCI
VSS3V66
VDD3V66
VSSUSB
VDDUSB
VSSCPU
VDDCPU
VSSMEM
VDDMEM
AVSS
AVDD
IREF
XTALIN[1]
XTALOUT[1]
1
4
7, 13, 19
10, 16, 22
32, 33
29, 36
24
27
40, 46
43, 49
53
56
37
38
39
5
6
3.3V Reference ground
3.3V Reference voltage supply
3.3V PCI ground
3.3V PCI voltage supply
3.3V AGP and Hub Link ground
3.3V AGP and Hub Link voltage supply
3.3V USB ground
3.3V USB voltage supply
3.3V CPU ground
3.3V CPU voltage supply
3.3V Memory ground
3.3V Memory voltage supply
Analog ground for PLL and Core
Analog voltage supply to PLL and Core
Reference current for external biasing
Reference crystal input
Reference crystal feedback
CPUCLK [0–3]
42, 45, 48, 51
CPU clock outputs
CPUCLK [0–3]B
41, 44, 47, 50
Inverse CPU clock outputs
PCICLK [0–9]
8, 9, 11, 12, 14, 15, 17, PCI clock outputs, synchronously running at 33.33 MHz
18, 20, 21
MemRef
55
MemRef clock output, drives memory clock generator
MemRefB
54
MemRefB clock output 180 degrees out of phase with MemRef
3V66_ [0–3]
30, 31, 34, 35
AGP and Hub Link clock outputs, running at 66 MHz
USBCLK [0–1]/Sel[A–B]
25, 26
Sel [A–B] inputs are sensed then internally latched on power-up be-
fore the pins are used for 48-MHz USB clock outputs
REFCLK[0–1]/MultSel[0–1] 2, 3
MultSel[0–1] inputs are sensed then internally latched on power-up
before the pins are Reference clock outputs, 14.318 MHz
PWR_DWN
28
SPREAD[2]
52
Active LOW input, powers down part when asserted
Active LOW input, enables spread spectrum when asserted
SEL133
23
CPU frequency select input (See Function Table)
Notes:
1. For best accuracy, use a parallel-resonant crystal, CLOAD = 18 pF. For crystals with different CLOAD, please refer to the application note, “Crystal Oscillator
Topics.”
2. Input is static HIGH or LOW. Frequency of toggling cannot exceed 30 MHz.
Document #: 38-07206 Rev. *A
Page 2 of 11
Share Link: