CXD4016R データシートの表示（PDF） - Sony Semiconductor

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CXD4016R

Transmission Digital Signal Processor IC for Infrared Spatial Digital Audio Communication

Sony Semiconductor 

CXD4016R

Pin Description

Pin

No.

Symbol

1 TESTMD

2 SMCK

3 IFEXMD

4 IIFSEL1

5 IIFSEL0

6 EXCKSEL

7 CHNM_BL

8 DIVCODE

9 PCMID

10 EMPIN

11 VDD

12 VSS

13 SCLK

14 XSCEN

15 SWDT

16 CSOD

17 DAPD

18 DACK

19 VDD

20 VSS

21 DAAOUT

22 DAAVD

23 DAAVS

24 DAVREF

25 DAVRO

26 VDD

27 VSS

28 TEST0

29 TEST1

30 TEST2

31 TEST3

32 TEST4

33 TEST5

34 TEST6

35 TEST7

36 PLREF

I/O

Description

I Test mode selector, normally fixed “L”.

I SCAN test pin, normally fixed “H”.

I IIF extension mode. (L : Normal mode, H : Extension mode)

I Audio input mode selection.

I Audio input mode selection.

I Clock selection for modulation. (L : APX internal connection, H : VCOT pin input)

I

Half-band : Channel number selection. (L : 0ch, H : 1ch)

Full-band : Bit length control. (L : Full bit, H : 16-bit limited)

I Full/Half-band mode selection. (L : Full-band, H : Half-band)

I Source_info pcm_id input, normally fixed “L”. (L : PCM data)

I Source_info emphasis input, (L : No emphasis, H : Emphasis)

— Digital power supply.

— Digital GND.

I Serial interface data clock input.

I Serial interface enable input (negative logic).

I Serial interface data write input.

O Chapter start delay output.

O Test pin.

O Test pin.

— Digital power supply.

— Digital GND.

O RF DAC output.

— Analog power supply for RF DAC.

— Analog GND for RF DAC.

I RF DAC reference voltage input, apply 1.1V (typ.)

I/O RF DAC internal current setting.

— Digital power supply.

— Digital GND.

O Test output pin.

O Test output pin.

O Test output pin.

O Test output pin.

O Test output pin.

O Test output pin.

O Test output pin.

O Test output pin.

O PLL reference output.

-5-

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