BU2616 データシートの表示（PDF） - ROHM Semiconductor

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BU2616

PLL frequency synthesizer for tuners

ROHM Semiconductor 

Audio ICs

BU2616F

(7) GT: Control of frequency measurement time

0: 32ms

1: 64ms

(8) SW: If this bit is set to ON while AMIN is

selected, swallow counter division is possible.

FIntermediate frequency detection circuit and the

FDO output.

(1) Structure

(9) PL PH: Control of charge pump output

PL = 0, PH = 0 PD1, PD2 go to PLL operation.

PL = 1, PH = 0 PD1, PD2 go to LO level.

PL = 0, PH = 1 PD1, PD2 go to HI level.

PL = 1, PH = 1 PD1, PD2 go to LO level.

(10) TS: Test data (0) is input

(2) How the IF frequency detection circuit operates

When control data CT is set to ON, the counter and the

amp go into operation. When CT equals 0, the amp input

pulldown counter is reset.

FExternal dimensions (Units: mm)

(3) Explanation of the DO

∗1 When the IF counter is OFF (CT = 0), SD input ap-

pears at the DO.

∗2 When the IF counter is set to ON (CT = 1), the con-

trol system keeps it at LO level until the measure-

ment is finished.

∗3 After the measurement is finished, it goes to HI level

if it is within the range of input frequency settings,

and is kept at LO level if it is beyond the range of in-

put frequency settings. When CT = 0, it returns to

the conditions described under paragraph ∗1.

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