Table 5.7 Static characteristic:Analog I/O pins(DP/DM)
Symbol
Parameter
Conditions
Min. Typ. Max.
USB2.0 Transceiver(HS)
Input Levels(differential receiver)
VHSDIFF
VHSCM
High speed differential
input sensitivity
High speed data signaling
common mode voltage
range
∣VI(DP)-VI(DM)∣
measured at the
connection as
application circuit
300
-50
500
Unit
mV
mV
VHSSQ
High speed squelch
detection threshold
Squelch detected
No squelch detected 150
100 mV
mV
VHSDSC
VHSOI
VHSOL
VHSOH
VCHIRPJ
VCHIRPK
RDRV
VTERM
VDI
VCM
High speed disconnection
Disconnection
detected
625
detection threshold
Disconnection not
detected
Output Levels
High speed idle level
output
-10
voltage(differential)
High speed low level
output
-10
voltage(differential)
High speed high level
output
voltage(differential)
-360
Chirp-J output voltage
(differential)
700
Chirp-K output voltage
(differential)
-900
Resistance
Equivalent resistance
used as internal chip
Driver output impedance
only
Overall resistance
including external
resistor
3
40.5
Termination
Termination voltage for
pull-up resistor on pin
3.0
RPU
USB1.1 Transceiver(FS/LS)
Input Levels(differential receiver)
Differential input
sensitivity
∣VI(DP)-VI(DM)∣
0.2
Differential common
mode voltage
0.8
Input Levels(single-ended receivers)
mV
525 mV
10 mV
10 mV
400 mV
1100 mV
-500 mV
6
9
Ω
45 49.5
3.6
V
V
2.5
V
Page 18 of 22
AU6391 USB2.0 to ATA/ATAPI Bridge Controller V1.00W
Official Release _ Public