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4.0 System Architecture and
Reference Design
4.1 AU6391 Block Diagram
Figure 4.1 AU6391 Block Diagram
USB
Upstream
XCVR
USB
SIE
RAM
ATA Control FIFO
ATA
Port
1.8 V
3.3 V
3.3V and 1.8V
Voltage
Regulator
/Power Switch
Processor
ROM
Arbitrator
5V
12MHz
XTAL
AU6391 USB2.0 to ATA/ATAPI Bridge Controller V1.00W
Official Release _ Public
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