AT26F004-SU(2005) データシートの表示（PDF） - Atmel Corporation

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AT26F004-SU
(Rev.:2005)

4-megabit 2.7-volt Only Serial Firmware DataFlash® Memory

Atmel Corporation 

Figure 2-1. 8-SOIC Top View

CS 1

SO 2

WP 3

GND 4

8 VCC

7 HOLD

6 SCK

5 SI

AT26F004

Figure 2-2. 8-MLF Top View

CS 1

SO 2

WP 3

GND 4

8 VCC

7 HOLD

6 SCK

5 SI

3. Block Diagram

CS

SCK

SI

SO

WP

HOLD

INTERFACE

CONTROL

AND

LOGIC

CONTROL LOGIC

Y-DECODER

X-DECODER

I/O BUFFERS

AND LATCHES

Y-GATING

FLASH

MEMORY

ARRAY

4. Memory Array

To provide the greatest flexibility, the memory array of the AT26F004 can be erased in four lev-

els of granularity including a full chip erase. In addition, the array has been divided into physical

sectors of various sizes, of which each sector can be individually protected from program and

erase operations. The sizes of the physical sectors are optimized for both code and data storage

applications, allowing both code and data segments to reside in their own isolated regions. The

Memory Architecture Diagram illustrates the breakdown of each erase level as well as the

breakdown of each physical sector.

3

3588A–DFLSH–10/05

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