74VHCT238A データシートの表示（PDF） - STMicroelectronics

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74VHCT238A

3 TO 8 LINE DECODER

STMicroelectronics 

®

74VHCT238A

3 TO 8 LINE DECODER

s HIGH SPEED: tPD = 8 ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA = 25 oC

s COMPATIBLE WITH TTL OUTPUTS:

VIH = 2V (MIN), VIL = 0.8V (MAX)

s POWER DOWN PROTECTION ON INPUTS &

OUTPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC (OPR) = 4.5V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 238

s IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74VHCT238A is an advanced high-speed

CMOS 3 TO 8 LINE DECODER fabricated with

sub-micron silicon gate and double-layer metal

wiring C2MOS technology.

If the device is enabled, 3 binary select inputs (A,

B and C) determine which one of the outputs will

go high. If enable input G1 is held low or either

SOP

TSSOP

PACKAGE

SOP

TSSOP

ORDER CODES

T UB E

T&R

74VHCT238AM 74VHCT238AMTR

74VHCT238ATTR

G2A or G2B is held high, decoding function is

inhibited and all the 8 outputs go to low.

Three enable inputs are provided to ease

cascade connection and application of this

address decoders for memory systems.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

March 2000

1/8

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