APW7136A データシートの表示（PDF） - Anpec Electronics

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APW7136A

1MHz, High-Efficiency, Step-Up Converter for 2 to 8 White LEDs

Anpec Electronics 

APW7136A/B/C

Application Information (Cont.)

Output Capacitor Selection (Cont.)

For ceramic capacitor application, the output voltage ripple

is dominated by the ∆VCOUT. When choosing the input and

output ceramic capacitors, the X5R or X7R with their

good temperature and voltage characteristics are

recommended.

Diode Selection

To achieve high efficiency, a Schottky diode must be used.

The current rating of the diode must meet the peak cur-

rent rating of the converter.

Setting the LED Current

In figure 1, the converter regulates the voltage on FB pin,

connected with the cathod of the lowest LED and the cur-

rent-sense resistor R1, at 0.25V (typical). Therefore the

current (I ), flowing via the LEDs and the R1, is calcu-

LED

lated by the following equation:

ILED = 0.25V/R1

Recommended Inductor Selection

Designator Manufacturer

Part Number

L1

GOTREND

GTSD32

Inductance (µH) Max DCR (ohm)

22

0.592

Saturation

Current (A)

0.52

Dimensions

L x W x H (mm3)

3.85 x 3.85 x 1.8

Recommended Capacitor Selection

Designator Manufacturer

Part Number

C1

Murata GRM188R60J475KE19

C2

Murata GRM21BR71H105KA12

Capacitance (µF)

4.7

1.0

TC Code

X5R

X7R

Rated Voltage (V)

6.3

50

Case size

0603

0805

Recommended Diode Selection

Designator Manufacturer Part Number

D1

Zowie

MSCD106

D1

Zowie

MSCD104

Maximum average forward

rectified current (A)

1.0

1.0

Maximum repetitive peak

reverse voltage (V)

60

40

Case size

0805

0805

Layout Consideration

For all switching power supplies, the layout is an impor-

tant step in the design; especially at high peak currents

and switching frequencies. If the layout is not carefully

done, the regulator might show noise problems and duty

cycle jitter.

1. The input capacitor should be placed close to the VIN

and GND. Connecting the capacitor with VIN and GND

pins by short and wide tracks without using any vias for

filtering and minimizing the input voltage ripple.

2. The inductor should be placed as close as possible to

the LX pin to minimize length of the copper tracks as

well as the noise coupling into other circuits.

3. Since the feedback pin and network is a high imped-

ance circuit, the feedback network should be routed

away from the inductor. The feedback pin and feed-

back network should be shielded with a ground plane

or track to minimize noise coupling into this circuit.

4. A star ground connection or ground plane minimizes

ground shifts and noise is recommended.

Via To OVP

To Anode of

WLEDs

VOUT

D1

LX

From Cathod

of WLEDs

L1

C1

VIN

Via To VOUT

VEN

VADJ

Via To GND

Refer to Fig. 3

Optimized APW7136 Layout

Copyright © ANPEC Electronics Corp.

11

Rev. A.2 - Jan., 2008

www.anpec.com.tw

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