AMD-762 データシートの表示（PDF） - Advanced Micro Devices

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AMD-762

AMD-762™ System Controller

Advanced Micro Devices 

24416C—December 2001

Preliminary Information

AMD-762™ System Controller Data Sheet

1 Features

Chapter 1

The AMD Athlon™ processor powers the next generation in computing

platforms, delivering the ultimate performance for cutting-edge

applications and an unprecedented computing experience.

The AMD-760MPX™ and AMD-760MP™ chipsets are highly

integrated system logic solutions that deliver enhanced

performance for the AMD Athlon™ processor and other

AMD Athlon processor system bus-compatible processors. The

AMD-760MPX chipset consists of the AMD-762™ system

controller in a 949-pin Ceramic Column Grid Array (CCGA)

package and the AMD-768™ peripheral bus controller. The

AMD-760MP chipset consists of the AMD-762 system controller in

a CCGA package and the AMD-766™ peripheral bus controller.

The AMD-762 system controller features the AMD Athlon

system bus, system memory controller, Accelerated Graphics

Port (AGP) controller, and Peripheral Component Interconnect

(PCI) bus controller. Figure 1 on page 5 shows a block diagram

for the AMD-760MPX chipset. Figure 2 on page 6 shows a block

diagram for the AMD-760MP chipset.

The AMD-762 system controller is designed with the following

features:

n Two AMD Athlon processor system buses support the

high-speed, split-transaction AMD Athlon system bus

interface. These buses are designed to operate at

100/200-MHz or 133/266-MHz double-data rate.

n A 66/33-MHz 64/32-bit PCI 2.2-compliant bus interface

supports up to seven bus masters plus the AMD-766

peripheral bus controller at 33 MHz or up to two bus masters

plus the AMD-768 peripheral bus controller at 66 MHz.

n The 66-MHz AGP 2.0-compliant interface supports 1x, 2x,

and 4x data transfer mode.

n High-speed memory—The AMD-762 system controller is

designed to support DDR SDRAM DIMMs, operating at

either 100/200-MHz or 133/266-MHz double-data rate. Note

that the DDR interface speed is always locked to the front-

side bus speed.

Features

1

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