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AM79C970 データシートの表示(PDF) - Advanced Micro Devices

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AM79C970 Datasheet PDF : 168 Pages
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PRELIMINARY
AMD
Basic Burst Read Cycles
The PCnet-PCI controller provides a burst mode to read
data from the transmit buffer. The burst mode must be
enabled by setting BREADE in BCR18. All PCnet-PCI
controller burst read transfers are of the PCI command
type Memory Read Line (type15). AD[1:0] will both be
ZERO during the address phase indicating a linear burst
order. All four byte enable signals will be ZERO during
the data phase as the PCnet-PCI controller always
reads a full 32-bit word when in burst mode.
Figure 4 shows a typical burst read access. The PCnet-
PCI controller arbitrates for the bus, is granted access,
and reads four 32-bit words (DWORD) from system
memory and then releases the bus. All four data phases
in this example take two clock cycles each, which is de-
termined by the timing of TRDY.
CLK
1
2
3
4
5
6
7
8
9
10
11
12
13
FRAME
AD
ADDR
DATA
DATA
DATA
DATA
C/BE
1110
0000
PAR
PAR
PAR
PAR
PAR
PAR
IRDY
TRDY
DEVSEL
REQ
GNT
DEVSEL is sampled by the PCnet-PCI controller.
Figure 4. Burst Read Cycles
18220C-6
Am79C970
1-891

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