SL74HC138D データシートの表示（PDF） - System Logic Semiconductor

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SL74HC138D

1-of-8 Decoder/Demultiplexer High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HC138

AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)

Symbol

Parameter

tPLH, tPHL Maximum Propagation Delay, Input A to

Output Y (Figures 1 and 4)

tPLH, tPHL Maximum Propagation Delay , CS1 to

Output Y (Figures 2 and 4)

tPLH, tPHL Maximum Propagation Delay , CS2 or CS3 to

Output Y (Figures 3 and 4)

tTLH, tTHL Maximum Output Transition Time, Any Output

(Figures 2 and 4)

CIN

Maximum Input Capacitance

VCC

Guaranteed Limit

V 25 °C to ≤85°C ≤125°C Unit

-55°C

2.0 135

170

205

ns

4.5 27

34

41

6.0 23

29

35

2.0 110

140

165

ns

4.5 22

28

33

6.0 19

24

28

2.0 120

150

180

ns

4.5 24

30

36

6.0 20

26

31

2.0 75

95

110

ns

4.5 15

19

22

6.0 13

16

19

-

10

10

10

pF

Power Dissipation Capacitance (Per Package)

CPD Used to determine the no-load dynamic power

consumption:

PD=CPDVCC2f+ICCVCC

Typical @25°C,VCC=5.0 V

55

pF

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

SLS

System Logic

Semiconductor

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