PM200DSA060_ データシートの表示（PDF） - MITSUBISHI ELECTRIC

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PM200DSA060_

USING INTELLIGENT POWER MODULES

MITSUBISHI ELECTRIC  

MITSUBISHI SEMICONDUCTORS POWER MODULES MOS

USING INTELLIGENT POWER MODULES

6.4. IPM Self Protection

6.4.1 Self Protection Features

operation and timing of each pro-

tection feature is described in Sec-

tions 6.4.2 through 6.4.5.

power down and failure on the

power device gate drive and fault

output are shown.

IPM (Intelligent Power Modules)

have sophisticated built-in protec-

tion circuits that prevent the power

devices from being damaged

should the system malfunction or

be over stressed. Our design and

applications engineers have devel-

oped fault detection and shut down

schemes that allow maximum utili-

zation of power device capability

without compromising reliability.

Control supply under-voltage, over-

temperature, over-current, and

short-circuit protection are all pro-

vided by the IPM's internal gate

control circuits. A fault output signal

is provided to alert the system con-

troller if any of the protection cir-

cuits are activated. Figure 6.14 is a

block diagram showing the IPMs

internally integrated functions. This

diagram also shows the isolated in-

terface circuits and control power

supply that must be provided by

the user. The internal gate control

circuit requires only a simple +15V

DC supply. Specially designed gate

drive circuits eliminate the need for

a negative supply to off bias the

IGBT. The IPM control input is de-

signed to interface with

optocoupled transistors with a mini-

mum of external components. The

6.4.2 Control Supply

Under-Voltage Lock-Out

The Intelligent Power Module's in-

ternal control circuits operate from

an isolated 15V DC supply. If, for

any reason, the voltage of this sup-

ply drops below the specified un-

der-voltage trip level (UVt), the

power devices will be turned off

and a fault signal will be generated.

Small glitches less than the speci-

fied tdUV in length will not affect the

operation of the control circuitry

and will be ignored by the under-

voltage protection circuit. In order

for normal operation to resume, the

supply voltage must exceed the un-

der-voltage reset level (UVr). Op-

eration of the under-voltage protec-

tion circuit will also occur during

power up and power down of the

control supply. This operation is

normal and the system controller's

program should take the fault out-

put delay (tfo) into account. Figure

6.15 is a timing diagram showing

the operation of the under-voltage

lock-out protection circuit. In this

diagram an active low input signal

is applied to the input pin of the

IPM by the system controller. The

effects of control supply power up,

Figure 6.14 IPM Functional Diagram

INTELLIGENT POWER MODULE

INPUT

SIGNAL

FAULT

OUTPUT

ISOLATED

POWER

SUPPLY

ISOLATING

INTERFACE

CIRCUIT

ISOLATING

INTERFACE

CIRCUIT

GATE

CONTROL

CIRCUIT

GATE DRIVE

OVER TEMP

UV LOCK-OUT

OVER CURRENT

SHORT CIRCUIT

SENSE

CURRENT

TEMPERATURE

SENSOR

CURRENT

SENSE

IGBT

COLLECTOR

EMITTER

Caution:

1. Application of the main bus

voltage at a rate greater than

20V/µs before the control

power supply is on and stabi-

lized may cause destruction of

the power devices.

2. Voltage ripple on the control

power supply with dv/dt in ex-

cess of 5V/µs may cause a

false trip of the UV lock-out.

6.4.3 Over-Temperature

Protection

The Intelligent Power Module has a

temperature sensor mounted on

the isolating base plate near the

IGBT chips. If the temperature of

the base plate exceeds the over-

temperature trip level (OT) the

IPMs internal control circuit will

protect the power devices by dis-

abling the gate drive and ignoring

the control input signal until the

over temperature condition has

subsided. In six and seven pack

modules all three low side devices

will be turned off and a low side

fault signal will be generated. High

side switches are unaffected and

can still be turned on and off by the

system controller. Similarly, in dual

type modules only the low side de-

vice is disabled. The fault output

will remain as long as the over-

temperature condition exists. When

the temperature falls below the

over-temperature reset level (OTr),

and the control input is high (off-

state) the power device will be en-

abled and normal operation will re-

sume at the next low (on) input sig-

nal. Figure 6.16 is a timing diagram

showing the operation of the over-

Sep.1998

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