AM29F040 データシートの表示（PDF） - Advanced Micro Devices

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AM29F040

4 Megabit (524,288 x 8-Bit) CMOS 5.0 Volt-only, Sector Erase Flash Memory

Advanced Micro Devices 

Table 4. Am29F040 Command Definitions

Command

Sequence

Read/Reset

Bus

Write

Cycles

Req’d

First Bus Second Bus Third Bus

Write Cycle Write Cycle Write Cycle

Fourth Bus

Read/Write

Cycle

Addr Data Addr Data Addr Data Addr Data

Fifth Bus Sixth Bus

Write Cycle Write Cycle

Addr Data Addr Data

Read/Reset

1 XXXXH F0H

Read/Reset

4

5555H AAH 2AAAH 55H 5555H F0H RA

RD

Autoselect

00H 01H

4 5555H AAH 2AAAH 55H 5555H 90H

01H A4H

Byte Program

4 5555H AAH 2AAAH 55H 5555H A0H PA

PD

Chip Erase

6 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H 5555H 10H

Sector Erase

6 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H SA 30H

Sector Erase Suspend

Erase can be suspended during sector erase with Addr (don’t care), Data (B0H)

Sector Erase Resume

Erase can be resumed after suspend with Addr (don’t care), Data (30H)

Notes:

1. Address bits A15, A16, A17, and A18 = X = Don’t Care for all address commands except for Program Address (PA), Sector

Address (SA), Read Address (RA), and autoselect sector protect verify.

2. Bus operations are defined in Table 1.

3. RA = Address of the memory location to be read.

PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the WEpulse.

SA = Address of the sector to be erased. The combination of A18, A17, A16 will uniquely select any sector (see Table 3).

4. RD = Data read from location RA during read operation.

PD = Data to be programmed at location PA. Data is latched on the rising edge of WE.

5. Read from non-erasing sectors is allowed in the Erase Suspend mode.

Read/Reset Command

The read or reset operation is initiated by writing the

read/reset command sequence into the command reg-

ister. Microprocessor read cycles retrieve array data

from the memory. The device remains enabled for

reads until the command register contents are altered.

The device will automatically power-up in the read/

reset state. In this case, a command sequence is not

required to read data. Standard microprocessor read

cycles will retrieve array data. This default value en-

sures that no spurious alteration of the memory content

occurs during the power transition. Refer to the AC

Read Characteristics and Waveforms for the specific

timing parameters.

Autoselect Command

Flash memories are intended for use in applications

where the local CPU alters memory contents. As such,

manufacture and device codes must be accessible

while the device resides in the target system. PROM

programmers typically access the signature codes by

raising A9 to a high voltage. However, multiplexing high

voltage onto the address lines is not generally desired

system design practice.

The device contains a command autoselect operation

to supplement traditional PROM programming method-

ology. The operation is initiated by writing the auto-

select command sequence into the command register.

Following the command write, a read cycle from ad-

dress XX00H retrieves the manufacture code of 01H. A

read cycle from address XX01H returns the device

code A4H (see Table 2). All manufacturer and device

codes will exhibit odd parity with the MSB (DQ7)

defined as the parity bit.

Scanning the sector addresses (A16, A17, A18) while

(A6, A1, A0) = (0, 1, 0) will produce a logical “1” at

device output DQ0 for a protected sector.

To terminate the operation, it is necessary to write the

read/reset command sequence into the register.

Byte Programming

The device is programmed on a byte-by-byte basis.

Programming is a four bus cycle operation. There are

two “unlock” write cycles. These are followed by the

program setup command and data write cycles. Ad-

dresses are latched on the falling edge of CE or WE,

whichever happens later and the data is latched on the

rising edge of CE or WE, whichever happens first. The

Am29F040

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