AK4552 データシートの表示（PDF） - Asahi Kasei Microdevices

部品番号

コンポーネント説明

一致するリスト

AK4552

3V 96kHz 24Bit ∆Σ CODEC

Asahi Kasei Microdevices 

ASAHI KASEI

SWITCHING CHARACTERISTICS

(Ta=25°C; VA, VD=2.4 ∼ 4.0V; CL=20pF)

Parameter

Symbol

min

typ

Master Clock Timing

Frequency

Pulse Width Low

Pulse Width High

fCLK

tCLKL

tCLKH

2.048

10

10

LRCK Frequency

Normal Speed

fsn

8

Double Speed

fsd

50

Quad Speed

fsq

100

Duty Cycle

Serial Interface Timing

Duty

45

BCLK Period

Normal Speed

Double Speed

Quad Speed

BCLK Pulse Width Low

Pulse Width High

LRCK Edge to BCLK “↑”

BCLK “↑” to LRCK Edge

LRCK Edge to SDTO (MSB)

BCLK “↓” to SDTO

SDTI Hold Time

SDTI Setup Time

Reset Timing

(Note 9)

(Note 9)

tBCK

tBCK

tBCK

tBCKL

tBCKH

tLRB

tBLR

tDLR

tDBS

tSDH

tSDS

1/96fsn

1/64fsd

1/64fsq

33

33

20

20

20

20

PDN Pulse Width

tPW

150

PDN “↑” to SDTO Valid (Note 10)

tPWV

2081

Note: 9. BCLK rising edge must not occur at the same time as LRCK edge.

Note: 10. These cycles are the number of LRCK rising from PDN rising.

[AK4552]

max

Units

38.4

MHz

ns

ns

50

kHz

100

kHz

200

kHz

55

%

ns

ns

ns

ns

ns

ns

ns

40

ns

40

ns

ns

ns

ns

1/fs

MS0055-E-01

-6-

2001/02

Share Link: