Functional Block Diagram
+VIN
STOP
Enable
H
L
START
+
C
—
VSTART
Start-Up
Regulator
+ UVLO
C
VREF —
VDD
Bootstrap Good
PWM Good
STATUS
Clock
Oscillator
CLK Q
DQ
CLR
MOSFET Driver
VDD
SQ
+
A
-
—
C
R
+
OUT
CS
PGND
VDD
Bandgap
Reference
Generator
RT
REF
NI
FB
COMP
SGND
Typical Application Circuit
HV9605C
+
+
48V INPUT
-
HV9605C
+VIN
STOP
VDD
STATUS
START
OUT
CS
PGND
SGND
RT REF NI FB COMP
+
+
TN2124K1
or
TN2524N8
+
+
40V
ISOLATED
OUTPUT
-
RESET
+5.0V
REFERENCED
TO INPUT (-)
TERMINAL
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
5
11/12/01
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com