ADSP-2188NKCA-320 データシートの表示（PDF） - Analog Devices

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ADSP-2188NKCA-320

DSP Microcomputer

Analog Devices 

ADSP-218xN Series

Memory Interface Pins

ADSP-218xN series members can be used in one of two

modes: Full Memory Mode, which allows BDMA operation

with full external overlay memory and I/O capability, or

Host Mode, which allows IDMA operation with limited

external addressing capabilities.

The operating mode is determined by the state of the Mode

C pin during RESET and cannot be changed while the

processor is running. Table 3 and Table 4 list the active

signals at specific pins of the DSP during either of the two

operating modes (Full Memory or Host). A signal in one

table shares a pin with a signal from the other table, with the

active signal determined by the mode that is set. For the

shared pins and their alternate signals (e.g., A4/IAD3), refer

to the package pinouts in Table 27 on page 40 and Table 28

on page 42.

Table 3. Full Memory Mode Pins (Mode C = 0)

Pin Name # of Pins I/O

A13 – 0

14

O

D23 – 0

24

I/O

Function

Address Output Pins for Program, Data, Byte, and I/O Spaces

Data I/O Pins for Program, Data, Byte, and I/O Spaces (8 MSBs are also used

as Byte Memory Addresses.)

Table 4. Host Mode Pins (Mode C = 1)

Pin Name # of Pins I/O

Function

IAD15–0 16

A0

1

D23 – 8

16

IWR

1

IRD

1

IAL

1

IS

1

IACK

1

I/O

IDMA Port Address/Data Bus

O

Address Pin for External I/O, Program, Data, or Byte Access1

I/O

Data I/O Pins for Program, Data, Byte, and I/O Spaces

I

IDMA Write Enable

I

IDMA Read Enable

I

IDMA Address Latch Pin

I

IDMA Select

O

IDMA Port Acknowledge Configurable in Mode D; Open Drain

1In Host Mode, external peripheral addresses can be decoded using the A0, CMS, PMS, DMS, and IOMS signals.

Terminating Unused Pins

Table 5 shows the recommendations for terminating

unused pins.

Table 5. Unused Pin Terminations

Pin Name1

XTAL

CLKOUT

A13–1 or

IAD12 – 0

A0

D23 – 8

D7 or

IWR

D6 or

IRD

D5 or

IAL

D4 or

IS

I/O

3-State

(Z)2

O

O

O (Z)

I/O (Z)

O (Z)

I/O (Z)

I/O (Z)

I

I/O (Z)

I

I/O (Z)

I

I/O (Z)

I

Reset

State

O

O

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

I

Hi-Z

I

Hi-Z

I

Hi-Z

I

Hi-Z3 Caused By

BR, EBR

IS

BR, EBR

BR, EBR

BR, EBR

BR, EBR

BR, EBR

BR, EBR

Unused Configuration

Float

Float4

Float

Float

Float

Float

Float

High (Inactive)

Float

High (Inactive)

Float

Low (Inactive)

Float

High (Inactive)

–6–

REV. 0

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