ADM6926
Product Review
• rate-limit control (64K/128K/256K/512K/1M/4M/10M/20M)
• per port auto learning enable/disable and if disable, forward non-learned packet to
CPU
• MAC address table accessible (in each entry, reserve one bit for CPU to
enable/disable aging out)
• forward special multicast, BPDU, GMRP, GVRP and IGMP packets to CPU port
• 128 pin QFP package with 3.3V/1.8V power supply
1.3 Block Diagram
Embedded Memory
Switching Fabric
Memory
BIST
EEPROM
Control
10/100M
MAC
10/100M
...
MAC
Interface Convertor
10/100M
MAC
10/100M
M10A/C100M
MAC
CLOCK
GENERATOR
PHY Control
BIAS
Clock/
LED
Interface
93C66
Interface
MII/RMII
Interface
MDC/
MDIO
SS-SMII
Interface
Figure 1-1 ADM6926 Block Diagram
ADMtek Inc.
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