AD9433PCB データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
一致するリスト
AD9433PCB Datasheet PDF : 24 Pages
| |||
AD9433
PIN FUNCTION DESCRIPTIONS
Pin Number
1, 3, 4, 9, 11, 33, 34, 35, 38, 39, 40,
43, 48, 51
2, 5, 6, 10, 36, 37, 44, 47, 52
7
8
Mnemonic
GND
VCC
ENCODE
ENCODE
14
15–20, 25–30
13, 22, 23, 32
12, 21, 24, 31
41
OR
D11–D0
VDD
DGND
DFS
42
SFDR MODE
45
VREFIN
46
VREFOUT
49
AIN
50
AIN
Function
Analog Ground
Analog Supply (5 V)
Encode Clock for ADC-Complementary
Encode Clock for ADC-True (ADC samples on rising edge of
ENCODE)
Out of Range Output
Digital Output
Digital Output Power Supply (3 V)
Digital Output Ground
Data Format Select. Low = Two’s Complement, High = Binary;
Floats Low
CMOS control pin that enables (SFDR MODE = 1), a proprietary
circuit that may improve the spurious free dynamic range (SFDR)
performance of the AD9433. It is useful in applications where the
dynamic range of the system is limited by discrete spurious
frequency content caused by nonlinearities in the ADC transfer
function. SFDR MODE = 0 for normal operation; Floats Low.
Reference Input for ADC (2.5 V typical)
Internal Reference Output (2.5 V typical); bypass with 0.1 µF to
Ground
Analog Input-True
Analog Input-Complement
PIN CONFIGURATION
52 51 50 49 48 47 46 45 44 43 42 41 40
GND 1
VCC 2
GND 3
GND 4
VCC 5
VCC 6
ENCODE 7
ENCODE 8
GND 9
VCC 10
GND 11
DGND 12
VDD 13
PIN 1
IDENTIFIER
AD9433BSQ
TOP VIEW
(Not to Scale)
14 15 16 17 18 19 20 21 22 23 24 25 26
39 GND
38 GND
37 VCC
36 VCC
35 GND
34 GND
33 GND
32 VDD
31 DGND
30 D0 (LSB)
29 D1
28 D2
27 D3
REV. 0
–5–
Share Link: 