AD8159(RevC) データシートの表示（PDF） - Analog Devices

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AD8159
(Rev.:RevC)

3.2 Gbps Quad Buffer Mux/Demux

Analog Devices 

Data Sheet

INTERFACING TO THE AD8159

TERMINATION STRUCTURES

To determine the best strategy for connecting to the high speed

pins of the AD8159, the user must first be familiar with the on-chip

termination structures. The AD8159 contains multiple types of

these structures (see Figure 39, Figure 40, and Figure 41). Note

that Port C has a slightly modified termination structure to support

the bidirectional feature.

VCC

VTTI

IP_xx

IN_xx

55Ω

55Ω

1173Ω

VEE

Figure 39. Simplified Input Circuit

VCC

VTTO

50Ω

50Ω

VIP

VIN

OP_xx

ON_xx

IT

VEE

Figure 40. Simplified Output Circuit (Port A or Port B)

VCC

VTTOI

55Ω

55Ω

VIP

1173Ω

VIN

OP_xx

ON_xx

IT

VEE

Figure 41. Simplified Output Circuit (Port C)

For input and bidirectional ports, the termination structure

consists of two 55 Ω resistors connected to a termination supply

and an 1173 Ω resistor connected across the differential inputs,

the latter being a result of the finite differential input impedance

of the equalizer.

For output ports, there are two 50 Ω resistors connected to the

termination supply. Note that the differential input resistance

for both structures is the same, 100 Ω.

AD8159

INPUT COMPLIANCE

The range of allowable input voltages is determined by the

fundamental limitations of the active input circuitry. This range

of signals is normally a function of the common-mode level of

the input signal, the signal swing, and the supply voltage. For a

given input signal swing, there is a range of common-mode

voltages that keeps the high and low voltage excursions within

acceptable limits. Similarly, for a given common-mode input

voltage, there is a maximum acceptable input signal swing.

There is also a minimum signal swing that the active input

circuitry can resolve reliably.

Figure 22 and Figure 25 summarize the input voltage ranges for

all ports. Note that the input range is different when comparing

bidirectional ports to strictly input ports. This is a consequence

of the additional circuitry required to support the bidirectional

feature on Port C.

AC Coupling

One way to simplify the input circuit and make it compatible

with a wide variety of driving devices is to use ac coupling. This

has the effect of isolating the dc common-mode levels of the driver

and the AD8159 input circuitry. AC coupling requires a capacitor

in series with each single-ended input signal, as shown in Figure 42.

This should be done in a manner that does not interfere with

the high speed signal integrity of the PCB.

VTTOD

VTTI/VTTIO

VCC

50Ω

50Ω

CP IP_xx

55Ω

55Ω

CN IN_xx 1173Ω

AD8159

VEE

DRIVER

Figure 42. AC Coupling Input Signal of the AD8159

When ac coupling is used, the common-mode level at the input

of the device is equal to VTTI. The single-ended input signal

swings above and below VTTI equally. The user can then use

Figure 22 and Figure 25 to determine the acceptable range of

common-mode levels and signal swing levels that satisfy the

input range of the AD8159.

If dc coupling is required, determining the input common-mode

level is less straightforward because the configuration of the

driver must also be considered. In most cases, the user sets VTTI

on the AD8159 to the same level as the driver output termination

voltage, VTTOD. This prevents a continuous dc current from

flowing between the two supplies. As a practical matter, both

devices can be terminated to the same physical supply.

Rev. C | Page 19 of 21

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