AD7682 データシートの表示（PDF） - Analog Devices

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AD7682

16-Bit, 4-Channel/8-Channel, 250 kSPS PulSAR ADC

Analog Devices 

AD7682/AD7689

Unipolar or Bipolar

Figure 26 shows an example of the recommended connection

diagram for the AD7682/AD7689 when multiple supplies are

available.

Bipolar Single Supply

Figure 27 shows an example of a system with a bipolar input

using single supplies with the internal reference (optional

different VIO supply). This circuit is also useful when the

amplifier/signal conditioning circuit is remotely located with

some common mode present. Note that for any input config-

uration, the inputs INx are unipolar and always referenced to

GND (no negative voltages even in bipolar range).

For this circuit, a rail-to-rail input/output amplifier can be used;

however, the offset voltage vs. input common-mode range

should be noted and taken into consideration (1 LSB = 62.5 μV

with VREF = 4.096 V). Note that the conversion results are in

twos complement format when using the bipolar input

configuration. Refer to the AN-581 Application Note for

additional details about using single-supply amplifiers.

ANALOG INPUTS

Input Structure

Figure 28 shows an equivalent circuit of the input structure of

the AD7682/AD7689. The two diodes, D1 and D2, provide ESD

protection for the analog inputs, IN[7:0] and COM. Care must

be taken to ensure that the analog input signal does not exceed

the supply rails by more than 0.3 V because this causes the

diodes to become forward biased and to start conducting

current.

These diodes can handle a forward-biased current of 130 mA

maximum. For instance, these conditions may eventually occur

when the input buffer supplies are different from VDD. In such

a case, for example, an input buffer with a short circuit, the

current limitation can be used to protect the part.

VDD

INx+

OR INx–

OR COM

GND

D1

CPIN

D2

RIN

CIN

Figure 28. Equivalent Analog Input Circuit

This analog input structure allows the sampling of the true

differential signal between INx+ and COM or INx+ and INx−.

(COM or INx− = GND ± 0.1 V or VREF ± 0.1 V). By using these

differential inputs, signals common to both inputs are rejected,

as shown in Figure 29.

70

65

60

55

50

45

40

35

30

1

10

100

1k

10k

FREQUENCY (kHz)

Figure 29. Analog Input CMRR vs. Frequency

During the acquisition phase, the impedance of the analog

inputs can be modeled as a parallel combination of the

capacitor, CPIN, and the network formed by the series

connection of RIN and CIN. CPIN is primarily the pin capacitance.

RIN is typically 3.5 kΩ and is a lumped component made up of

serial resistors and the on resistance of the switches. CIN is

typically 27 pF and is mainly the ADC sampling capacitor.

Selectable Low Pass Filter

During the conversion phase, where the switches are opened,

the input impedance is limited to CPIN. While the AD7682/

AD7689 are acquiring, RIN and CIN make a one-pole, low-pass

filter that reduces undesirable aliasing effects and limits the

noise from the driving circuitry. The low-pass filter can be

programmed for the full bandwidth or ¼ of the bandwidth with

CFG[6] as shown in Table 9. Note that the converters

throughout must also be reduced by ¼ when using the filter. If

the maximum throughput is used with the BW set to ¼, the

converter acquisition time, tACQ, will be violated, resulting in

increased THD.

Input Configurations

Figure 30 shows the different methods for configuring the analog

inputs with the configuration register (CFG[12:10]). Refer to

the Configuration Register, CFG, section for more details.

Rev. 0 | Page 18 of 28

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