EVAL-AD7142-1EB データシートの表示（PDF） - Analog Devices

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EVAL-AD7142-1EB

Programmable Capacitance-to-Digital Converter with Environmental Compensation

Analog Devices 

AD7142

I2C TIMING SPECIFICATIONS (AD7142-1)

TA = −40°C to +85°C; VDRIVE = 1.65 V to 3.6 V; AVCC, DVCC = 2.6 V to 3.6 V, unless otherwise noted. Sample tested at 25°C to ensure

compliance. All input signals timed from a voltage level of 1.6 V.

Table 5. I2C Timing Specifications1

Parameter

Limit

fSCLK

400

t1

0.6

t2

1.3

t3

0.6

t4

100

t5

300

t6

0.6

t7

0.6

t8

1.3

tR

300

tF

300

Unit

kHz max

μs min

μs min

μs min

ns min

ns min

μs min

μs min

μs min

ns max

ns max

Description

Start condition hold time, tHD; STA

Clock low period, tLOW

Clock high period, tHIGH

Data setup time, tSU; DAT

Data hold time, tHD; DAT

Stop condition setup time, tSU; STO

Start condition setup time, tSU; STA

Bus free time between stop and start conditions, tBUF

Clock/data rise time

Clock/data fall time

1 Guaranteed by design, not production tested.

200µA

IOL

TO OUTPUT

PIN CL

50pF

1.6V

200µA

IOH

Figure 3. Load Circuit for Digital Output Timing Specifications

Rev. 0 | Page 6 of 68

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