CS4391(2000) データシートの表示（PDF） - Cirrus Logic
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CS4391 Datasheet PDF : 40 Pages
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CS4391
SWITCHING CHARACTERISTICS - PCM MODES (TA = -10 to 70° C; VL = 5.5 to 1.8 Volts;
Inputs: Logic 0 = 0 V, Logic 1 = VL, CL = 20 pF)
Parameters
Input Sample Rate
LRCK Duty Cycle
MCLK Duty Cycle
SCLK Frequency
SCLK Frequency
SCLK rising to LRCK edge delay
SCLK rising to LRCK edge setup time
SDATA valid to SCLK rising setup time
SCLK rising to SDATA hold time
Symbol
Min
Fs
4
45
40
-
Note 22
-
tslrd
20
tslrs
20
tsdlrs
20
tsdh
20
Typ
Max
Units
-
200
kHz
50
55
%
50
60
%
-
MCLK/2
Hz
-
MCLK/4
Hz
-
-
ns
-
-
ns
-
-
ns
-
-
ns
Notes: 22. This serial clock is available only in Control Port Mode when the MCLK Divide bit is enabled.
LRCK
t slrd
SCLK
SDATA
t sdlrs
t slrs
t sdh
Figure 1. Serial Mode Input Timing
8
DS335PP3
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