AD5762R(Rev0) データシートの表示（PDF） - Analog Devices

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AD5762R
(Rev.:Rev0)

Complete Dual, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC

Analog Devices 

AD5762R

Timing Diagrams

SCLK

SYNC

SDIN

LDAC

VOUTA/

VOUTB

LDAC = 0

VOUTA/

VOUTB

CLR

VOUTA/

VOUTB

1

2

t6

t4

t1

24

t3

t2

t5

t7

DB23

t8

DB0

t10

t9

t10

t18

t12

t11

t13

t14

t12

t17

Figure 2. Serial Interface Timing Diagram

SCLK

SYNC

SDIN

SDO

LDAC

t6

t4

t7

DB23

t1

24

t3

t2

t8

DB0 DB23

INPUT WORD FOR DAC N

INPUT WORD FOR DAC N – 1

t15

DB23

UNDEFINED

INPUT WORD FOR DAC N

48

t5

t16

DB0

DB0

t9

t10

Figure 3. Daisy-Chain Timing Diagram

Rev. 0 | Page 8 of 32

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