S82091AA データシートの表示（PDF） - Intel

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S82091AA

ADVANCED INTEGRATED PERIPHERAL (AIP)

Intel 

82091AA

4 1 1 CFGINDX CFGTRGT CONFIGURATION INDEX REGISTER AND TARGET PORT

I O Address Hardware Configurable (see Table 4)

Default Value 00h

Attribute

Read Write

Size

8 bits

CFGINDX and CFGTRGT are used to access 82091AA configuration space where all of the 82091AA configu-

ration registers are located CFGINDX and CFGTRGT are located in the host I O address space and the

address locations are hardware configurable as shown in Table 4 CFGINDX is an 8-bit register that contains

the address index of the 82091AA configuration register to be accessed CFGTRGT is a port for reading data

from or writing data to the configuration register whose index address matches the address stored in the

CFGINDX Register Thus to access a configuration register CFGINDX must first be programmed with the

index address A software example is provided in this section demonstrating how to access the configuration

registers

Table 4 Configuration Register Access Addresses

Address Selection

Primary Address

Secondary Address

X-Bus Implementation

Index

Target

22h

23h

24h

25h

ISA Bus Implementation

Index

Target

26Eh

26Fh

398h

399h

Table 5 summarizes the 82091AA configuration space Following the table is a detailed description of each

register The register descriptions are arranged in the order that they appear in Table 5

Bit

Description

7 0 82091AA Configuration Register Address Index Bits 7 0 correspond to SD 7 0

30

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