74VHCT573 データシートの表示（PDF） - Fairchild Semiconductor

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74VHCT573

Octal D-Type Latch with 3-STATE Outputs

Fairchild Semiconductor 

Functional Description

The VHCT573A contains eight D-type latches with 3-

STATE output buffers. When the Latch Enable (LE) input is

HIGH, data on the Dn inputs enters the latches. In this con-

dition the latches are transparent, i.e., a latch output will

change state each time its D input changes. When LE is

LOW the latches store the information that was present on

the D inputs, a setup time preceding the HIGH-to-LOW

transition of LE. The 3-STATE buffers are controlled by the

Output Enable (OE) input. When OE is LOW, the buffers

are enabled. When OE is HIGH the buffers are in the high

impedance mode, but, this does not interfere with entering

new data into the latches.

Truth Table

Inputs

OE

LE

L

H

L

H

L

L

H

X

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Z = High Impedance

Outputs

D

On

H

H

L

L

X

O0

X

Z

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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