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74VHCT374A(2005) データシートの表示(PDF) - Fairchild Semiconductor

部品番号
コンポーネント説明
一致するリスト
74VHCT374A
(Rev.:2005)
Fairchild
Fairchild Semiconductor Fairchild
74VHCT374A Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Pin Descriptions
Truth Table
Pin Names
D0–D7
CP
OE
O0–O7
Description
Data Inputs
Clock Pulse Input 3-STATE
Output Enable Input 3-STATE
Outputs
Functional Description
The VHCT374A consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the state
of their individual D inputs that meet the setup and hold
time requirements on the LOW-to-HIGH Clock (CP) transi-
Inputs
Outputs
Dn
H
CP
OE

L
On
H
L

L
L
X
X
H
Z
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
LOW-to-HIGH Transition
tion. With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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