74LCX374BQX データシートの表示（PDF） - Fairchild Semiconductor

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74LCX374BQX

Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

Fairchild Semiconductor 

Logic Symbol

Connection Diagrams

Pin Assignments for

SOIC, SOP, SSOP, TSSOP

Pad Assignments for DQFN

(Top View)

Logic Diagram

Pin Descriptions

Pin Names

D0–D7

CP

OE

O0–O7

Description

Data Inputs

Clock Pulse Input

Output Enable Input

3-STATE Outputs

Truth Table

Inputs

Outputs

Dn

H

CP



OE

L

On

H

L



L

L

X

L

L

O0

X

X

H

Z

H HIGH Voltage Level

L LOW Voltage Level

X Immaterial

Z High Impedance

LOW-to-HIGH Transition

O0 Previous O0 before HIGH-to-LOW of CP

Functional Description

The LCX374 consists of eight edge-triggered flip-flops with

individual D-type inputs and 3-STATE true outputs. The

buffered clock and buffered Output Enable are common to

all flip-flops. The eight flip-flops will store the state of their

individual D inputs that meet the setup and hold time

requirements on the LOW-to-HIGH Clock (CP) transition.

With the Output Enable (OE) LOW, the contents of the

eight flip-flops are available at the outputs. When the OE is

HIGH, the outputs go to the high impedance state. Opera-

tion of the OE input does not affect the state of the flip-

flops.

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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