74ACT245B データシートの表示（PDF） - STMicroelectronics

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74ACT245B

OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS (NON INVERTED)

STMicroelectronics 

74ACT245

OCTAL BUS TRANSCEIVER

WITH 3 STATE OUTPUTS (NON INVERTED)

s HIGH SPEED: tPD = 5.4ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 4 µA(MAX.) at TA=25°C

s COMPATIBLE WITH TTL OUTPUTS

VIH = 2V (MIN.), VIL = 0.8V (MAX.)

s 50Ω TRANSMISSION LINE DRIVING

CAPABILITY

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 24mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC (OPR) = 4.5V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 245

s IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74ACT245 is an advanced high-speed CMOS

OCTAL BUS TRANSCEIVER (3-STATE)

fabricated with sub-micron silicon gate and

double-layer metal wiring C2MOS tecnology.

This IC is intended for two-way asynchronous

communication between data buses and the

direction of data transmission is determined by

DIR input. The enable input G can be used to

disable the device so that the buses are effectively

isolated.

PIN CONNECTION AND IEC LOGIC SYMBOLS

DIP

SOP

TSSOP

ORDER CODES

PACKAGE

DIP

SOP

TSSOP

TUBE

74ACT245B

74ACT245M

T&R

74ACT245MTR

74ACT245TTR

The device is designed to interface directly High

Speed CMOS systems with TTL, NMOS and

CMOS output voltage levels.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

IT IS PROHIBITED TO APPLY A SIGNAL TO A

TERMINAL WHEN IT IS IN OUTPUT MODE AND

WHEN A BUS THERMINAL IS FLOATING (HIGH

IMPEDANCE STATE) IT IS REQUIRED TO FIX

THE INPUT LEVEL BY MEANS OF EXTERNAL

PULL DOWN OR PULL UP RESISTOR.

April 2001

1/9

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