GS881E18AT-250 データシートの表示（PDF） - Giga Semiconductor

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GS881E18AT-250

512K x 18, 256K x 36 9Mb Sync Burst SRAMs

Giga Semiconductor 

Write Cycle Timing

Preliminary

GS881E18/36AT-250/225/200/166/150/133

CK

ADSP

ADSC

ADV

A0–An

GW

BW

BA–BD

E1

Single Write

Burst Write

Write

Deselected

tS tH

tS tH

tKH tKL tKC ADSP is blocked by E inactive

ADSC initiated write

tS tH

tS tH ADV must be inactive for ADSP Write

WR1

WR2

WR3

tS tH

tH

tS

tS tH

WWRR11

tS tH

WR2

WWRR33

E1 masks ADSP

G

DQA–DQD Hi-Z

E1 only sampled with ADSP or ADSC

tS tH

D1A

Write specified byte for 2A and all bytes for 2B, 2C& 2D

D2A

D2B

D2C

D2D

D3A

Rev: 1.01 3/2002

17/34

© 2001, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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