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P4C150-35LMB データシートの表示(PDF) - Performance Semiconductor

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一致するリスト
P4C150-35LMB
Performance-Semiconductor
Performance Semiconductor Performance-Semiconductor
P4C150-35LMB Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
P4C150
AC CHARACTERISTICS—WRITE CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Sym.
Parameter
-10
-12
-15
-20
-25
-35
Min Max Min Max Min Max Min Max Min Max Min Max Unit
tWC Write Cycle Time
10
12
15
20
25
35
ns
tCW Chip Enable Time to End of Write 8
10
11
13
15
20
ns
tAW Address Valid to End of Write
8
10
13
16
20
25
ns
tAS Address Set-up Time
0
1
1
1
2
2
ns
t Write Pulse Width
WP
8
10
11
13
15
20
ns
tAH
Address Hold Time from
End of Write
0
1
1
1
2
2
ns
t Data Valid to End of Write
5
8
11
13
15
20
ns
DW
tDH Data Hold Time
0
1
1
1
2
2
ns
tWZ Write Enable to Output in High Z
5
8
12
15
20
25 ns
tOW Output Active from End of Write 2
2
2
3
3
3
ns
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)(10)
(12)
t WC
ADDRESS
CS
t CW
t AW
t WP
t WR
t AH
WE
DATA IN
DATA OUT
t AS
DATA UNDEFINED
t
(8)
WZ
t DW
DATA VALID
t DH
t
(8,
OW
11)
HIGH IMPEDANCE
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CS CONTROLLED)(10)
(12)
t WC
ADDRESS
CS
WE
DATA IN
t AS
t CW
t AW
t WP
t AH
t WR
t DW
t DH
DATA VALID
DATA OUT
HIGH IMPEDANCE
Notes:
10. CS and WE must be LOW for WRITE cycle.
11. If CS goes HIGH simultaneously with WE high, the output remains
in a high impedance state.
12. Write Cycle Time is measured from the last valid address to the first
transition address.
29

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