datasheetbank_Logo
データシート検索エンジンとフリーデータシート

AD8346ARUZ-REEL データシートの表示(PDF) - Analog Devices

部品番号
コンポーネント説明
一致するリスト
AD8346ARUZ-REEL
ADI
Analog Devices ADI
AD8346ARUZ-REEL Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
AD8346
EVALUATION BOARD
The schematic of the AD8346 evaluation board is shown in
Figure 30. This is a 4-layer FR4 board; the two center layers are
used as ground planes and the top and bottom layers are used
for signal and power. Figure 31 shows the layout and Figure 32
shows the silkscreen. The evaluation board circuit closely
follows the basic connections circuit shown in Figure 27.
Slide SW1 to the A position to connect the ENBL pin to +VS
via the 10 kΩ pull-up resistor REP. Slide SW1 to the B position
to disable the device by grounding the ENOP pin through the
49.9 Ω pull-down resistor REG. The device may be enabled via
an external voltage applied to the SMA connector ENOP or TP2.
All connectors are of the SMA type. The I and Q inputs are
provided with pads for implementing a simple RC filter
network. The local oscillator input is driven through a balun
(M/A-COM Part Number ETC1-1-13).
CIP
CQP
OPEN
RIP
AD8346
OPEN
RQP
IP
1 IBBP
QBBP 16
QP
0Ω
RIS
RQS
0Ω
RIN
OPEN
OPEN
RQN
IN
2 IBBN
QBBN 15
QN
0Ω
CIN
CQN
0Ω
OPEN
OPEN
3 COM1
COM4 14
RLON
OPEN
LO
5
1
RLOS
OPEN
T1
ETC1-1-13 2
4
3
CLON
100pF
CLOP
100pF
4 COM1
5 LOIN
6 LOIP
COM4 13
VPS2 12
VOUT 11
RLOP
OPEN
7 VPS1
COM3 10
TP2
ENOP
+VS
C1
R7
C2
8 ENBL
COM2 9
0.01μF
0Ω
100pF
ENOP
REP
10kΩ
A
SW1
B
REG
49.9kΩ
R2
C4
0Ω
100pF
CVO
100pF
C3
0.01μF
+VS
VOUT
Figure 30. Evaluation Board Schematic
Rev. A | Page 14 of 20

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]