2 Mbit Flash + 1 Mbit SRAM ComboMemory
SST31LF021 / SST31LF021E
EOL Data Sheet
TABLE 12: FLASH PROGRAM/ERASE CYCLE TIMING PARAMETERS (VDD = 3.0-3.6V)
SST31LF021-70
SST31LF021E-300
Symbol Parameter
Min
Max
Min
Max
TBP
Byte-Program Time
20
20
TAS
Address Setup Time
0
0
TAH
Address Hold Time
30
50
TBS
WE# and BEF# Setup Time
0
0
TBH
WE# and BEF# Hold Time
0
0
TOES
OE# High Setup Time
0
0
TOEH
OE# High Hold Time
10
10
TBP
BEF# Pulse Width
40
100
TWP
WE# Pulse Width
40
100
TWPH
WE# Pulse Width High
30
50
TBPH
BEF# Pulse Width High
30
50
TDS
Data Setup Time
40
50
TDH
Data Hold Time
0
0
TIDA
Software ID Access and Exit Time
150
150
TSE
Sector-Erase
25
25
TSBE
Bank-Erase
100
100
TBS
Bank Enable Setup Time for Concurrent Operation
0
0
Units
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ns
T12.3 1137
©2007 Silicon Storage Technology, Inc.
11
S71137-06-EOL
05/07