PDM41028LA10TSOATR データシートの表示（PDF） - Paradigm Technology
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PDM41028LA10TSOATR Datasheet PDF : 8 Pages
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PDM41028
Write Cycle No. 1 (Write Enable Controlled)
tWC
ADDR
CE
tAW
tAH
tCW
WE
DIN
DOUT
tAS
HIGH-Z
tWP2
tDS
DATA VALID
tHZWE
HIGH-Z
tDH
tLZWE
Write Cycle No. 2 (Write Enable Controlled)
tWC
ADDR
tAW
tAH
tCW
CE
tAS
WE
DIN
tWP1
tDS
tDH
DATA VALID
DOUT
NOTE: Output Enable (OE) is inactive (high)
HIGH-Z
Write Cycle No. 3 (Chip Enable Controlled)
ADDR
CE
WE
DIN
tAW
tAS
tWC
tCW
tWP1
tDS
DATA VALID
DOUT
HIGH-Z
tAH
tDH
6
Rev. 2.2 - 4/29/98
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