10XS3412 データシートの表示（PDF） - Freescale Semiconductor

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10XS3412

Quad High Side Switch (Dual 10 mOhm, Dual 12 mOhm)

Freescale Semiconductor 

ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

Table 4. Static Electrical Characteristics (continued)

Characteristics noted under conditions 6.0 V ≤ VPWR ≤ 20 V, 3.0 V ≤ VDD ≤ 5.5 V, -40 °C ≤ TA ≤ 125 °C, GND = 0 V, unless

otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless

otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

CONTROL INTERFACE

Input Logic High Voltage(20)

Input Logic Low Voltage(20)

Input Logic Pull-down Current (SCLK, SI)(23)

Input Logic Pull-up Current (CS)(24)

SO, FS Tri-state Capacitance(21)

Input Logic Pull-down Resistor (RST, WAKE and IN[0:3])

Input Capacitance(21)

Wake Input Clamp Voltage(22), ICL(WAKE) < 2.5 mA

10XS3412CHFK

10XS3412DHFK

VIH

2.0

VIL

-0.3

IDWN

5.0

IUP

5.0

CSO

–

RDWN

125

CIN

–

VCL(WAKE)

19

20

–

VDD+0.3

V

–

0.8

V

–

20

μA

–

20

μA

–

20

pF

250

500

kΩ

4.0

12

pF

V

25

32

27

35

Wake Input Forward Voltage

ICL(WAKE) = -2.5 mA

VF(WAKE)

- 2.0

–

V

- 0.3

SO High state Output Voltage

IOH = 1.0 mA

SO and FS Low state Output Voltage

IOL = -1.0 mA

VSOH

VDD-0.4

–

VSOL

–

–

V

–

V

0.4

SO, CSNS and FS Tri-state Leakage Current

CS = VIH and 0 V < VSO < VDD, or FS = 5.5 V, or CSNS=0.0 V

FSI External Pull-down Resistance(25)

Watchdog Disabled

Watchdog Enabled

ISO(LEAK)

- 2.0

0

μA

2.0

RFS

kΩ

–

0

1.0

10

Infinite

–

Notes

20. Upper and lower logic threshold voltage range applies to SI, CS, SCLK, RST, IN[0:3] and WAKE input signals. The WAKE and RST

signals may be supplied by a derived voltage referenced to VPWR.

21. Input capacitance of SI, CS, SCLK, RST, IN[0:3] and WAKE. This parameter is guaranteed by process monitoring but is not production

tested.

22. The current must be limited by a series resistance when using voltages > 7.0 V.

23. Pull-down current is with VSI > 1.0 V and VSCLK > 1.0 V.

24. Pull-up current is with VCS < 2.0 V. CS has an active internal pull-up to VDD.

25. In Fail Safe HS[0:3] depends respectively on ON[0:3]. FSI has an active internal pull-up to VREG ~ 3.0 V.

10XS3412

12

Analog Integrated Circuit Device Data

Freescale Semiconductor

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