A2V64S40 データシートの表示（PDF） - Unspecified
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A2V64S40 Datasheet PDF : 79 Pages
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Powerchip Semiconductor Corporation
A2V64S40CTP
64M Single Data Rate Synchronous DRAM
AC CHARACTERISTICS(AC operating conditions unless otherwise noted)
Parameter
-5
-6
-7
-75
Symbol
Unit
Min Max Min Max Min Max Min Max
CLK cycle time
CAS latency=3
tCC (3)
5
6
7
7.5
ns
CAS latency=2
tCC (2)
10
10
10
10
Note
1
CLK to valid output delay
CAS latency=3
CAS latency=2
tSAC (3)
tSAC (2)
5
6
6
6
6
6
ns
1,2
Output data hold time
CAS latency=3
CAS latency=2
tOH (3)
tOH (2)
2.5
3
3
3
3
3
ns
2
CLK high pulse width
tCH
2.5
3
3
ns
3
CLK low pulse width
tCL
2.5
3
3
ns
3
Input setup time
Input hold time
tSS
tSH
1.5
2
2
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1
1
1
ns
3
ns
3
CLK to output in Low-Z
tSLZ
1
1
1
ns
2
CLK to output in Hi-Z
CAS latency=3
tSHZ
CAS latency=2
5
6
6
ns
6
6
6
NOTES :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Revision 1.0
Page 7/38
March, 2005
Datasheet pdf - http://www.DataSheet4U.net/
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