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MXC6202M データシートの表示(PDF) - Unspecified

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MXC6202M Datasheet PDF : 10 Pages
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Fourth cycle: Master device sends a START command
followed by calling Memsic device address with a WRITE
(8th SCL, SDA keep low). An “acknowledge” should be
sent by Memsic device at the end.
Fifth cycle: Master device writes to Memsic device a
“[00000000]” as the starting address for which internal
memory is to be read. Since “[00000000]” is the address of
internal control register, reading from this address can serve
as a verification of operation and to confirm the write
command has been successful. Note: the starting address in
principle can be any of the 5 addresses. For example, user
can start read from address [0000001], which is X channel
MSB.
Sixth cycle: Master device calls Memsic device address
with a READ (8th SCL cycle SDA line high). Memsic
device should acknowledge at the end.
Seventh cycle: Master device cycles SCL line, first
addressed memory data appears on SDA line. If in step 7,
“[00000000]” was sent, internal control register data
should appear (in the following steps, this case is assumed).
Master device should send acknowledge at the end.
Eighth cycle: Master device continues cycle SCL line, next
byte of internal memory should appear on SDA line (MSB
of X channel). The internal memory address pointer
automatically moves to the next byte. Master
acknowledges.
Ninth cycle: LSB of X channel. In the case that TOEN bit
of internal register was set to “1”, the MSB and LSB of
TOUT (temperature) should appear in last two steps.
Tenth cycle: MSB of Y channel.
Eleventh cycle: LSB of Y channel.
Master ends communications by sending NO acknowledge
and followed by a STOP command. Note: if mater device
continues to cycle SCL line, the memory pointer will go to
sixth and seventh positions, which always have
“[00000000]”. After seventh position, pointer will go to
zero again.
Optional: Master powers down Memsic device by writing
into internal control register. (See step 1 through 4 for
WRITE operation)
LCC-8 PACKAGE DRAWING
Hermetically Sealed Package Outline
MEMSIC MXC6202G/H/M/N Rev.B
Page 10 of 10
11/10/2005

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