U842B データシートの表示（PDF） - Temic Semiconductors

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U842B

Wiper Control for Intermittent and Wipe/ Wash Mode

Temic Semiconductors 

U842B

VBatt

C1

47 µF

R1

180 Ω

8

7

6

5

U842B

R9

220 kΩ

R7

1.5 kΩ

C2

100 nF

1

2

3

4

R4

10 kΩ

Switch

INT

Button

WASH

PARK

R5

47 kΩ

R6

10 kΩ

R11

360 Ω

VR1

1 kΩ

Figure 3. Basic cicuitry

13288

Variable Debouncing Times

Debouncing is basically done by counting oscillator

clocks starting with the occurance of any input signal.

Caused by the asynchronism of input signal and IC-clock,

the debouncing time may vary in a certain range.

Figure 4 shows the short circuit debouncing as an

example:

During the relay activation, a comparator monitors the

output current at each positive edge of the clock to load

a 3-stage shift register in the case of a detected short cir-

cuit condition i.e., I > 500 mA. With the third edge, the

output stage is disabled. Dependent on the short circuit

occurence the delay time may range from 2 to 3 clock

cycles.

The timing can be adjusted by variation of the external

frequency-determining components ( R/C).

The potentiometer at Pin 4 determines the interval pause,

which can be varied by adjusting the upper charging

threshold of the oscillator. For all other time periods, an

internal voltage divider determines the upper charging

threshold of the oscillator (see figure 2).

Timing

Fixed:

Relay activation time

Dry wiping

Interval pause

Switch-on delay INT

Variable:

Debouncing time INT

Debouncing time WASH

1. pre-wash delay

2. reverse debouncing

Debouncing time PARK

Debouncing time SC

t5 =

t2 =

t6 =

t4D =

160 1/f0

896 1/f0

or 3 cycles

872 1/f0

8 1/f0

t4 = 24 to 32 1/f0

t1 =

t1.R =

t8 =

t7 =

112 to 128 1/f0

16 to 32 1/f0

6 to 8 1/f0

2 to 3 1/f0

TELEFUNKEN Semiconductors

Rev. A2, 03-Feb-97

3 (12)

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