![](/html/Toshiba/186594/page28.png)
TH58NVG1S3AFT05
(11) When six address cycles are input
Although the device may read in sixth address, it is ignored inside the chip.
Read operation
CLE
CE
WE
ALE
I/O
00H
RY / BY
Program operation
Address input
Figure 22.
30H
ignored
CLE
CE
WE
ALE
I/O
80H
Address input
ignored
Figure 23.
Data input
2003-05-19A 28/32