STV6412A データシートの表示（PDF） - STMicroelectronics
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STV6412A Datasheet PDF : 31 Pages
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STV6412A
I2C bus selection
Table 21. Output signals (read mode)
Reg.
addr
(hex)
Description
Data
Bits
d7 d6 d5 d4 d3 d2 d1 d0
Comments
Slow blanking TV SCART
2 X X X X X X 0 1 Input <2 V
X X X X X X 1 0 Input 16/9 format
X X X X X X 1 1 Input 4/3 format
2 X X X X 0 1 X X Input <2 V
Slow blanking VCR SCART
X X X X 1 0 X X Input 16/9 format
X X X X 1 1 X X Input 4/3 format
Interrupt flag
1 X X X 0 X X X X No change since read
X X X 1 X X X X One change has been detected
(refer to Note 1)
Note: 1 The interrupt flag will be cleared when this register is read. To prepare for a new interrupt, a
“1” must be re-written in the IT enable bit (Reg. 04, d7).
t(s) 3.2
Power-on reset — bus register initial conditions
uc Power-on reset is active when the supply VDD is less than 3.5 volts.
d Non-significant bits (X) are pre-set to “0”
ro .
P Reg.
Data
te addr
(hex) d7 d6 d5 d4 d3 d2 d1 d0
Comments
sole 00
0
0
0
0
0
0
0
0
Audio TV and cinch outputs are in stereo mode, 0 dB gain
adjustment.
- Ob 01
0
0
0
0
0
0
0
0
TV, cinch and VCR audio outputs are muted. VCR output is in stereo
mode.
) 02 0 0 0 0 0 0 0 0 VCR, TV and RFmod video outputs are muted.
ct(s 03
0
0
0
0
0
0
0
0
Fast blanking is forced to ‘0’. RGB outputs are muted and in high
impedance.
du 04 0 0 0 0 0 0 0 0 C_GATE is high. C_VCR is high impedance.
Pro 05
0
0
0
0
0
0
0
0
Encoder and VCR R/Csub bottom level clamp, RGB outputs 6 dB
gain, and slow blanking parts are in read mode.
Obsolete 06 0 0 0 0 0 0 0 0 All internal blocks are ON.
Doc ID 9754 Rev 2
21/31
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