MAX3421E データシートの表示（PDF） - Maxim Integrated

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MAX3421E

USB Peripheral/Host Controller with SPI Interface

Maxim Integrated 

MAX3421E

USB Peripheral/Host Controller

with SPI Interface

GPOUT7–GPOUT0

The SPI master controls the GPOUT3–GPOUT0 states

by writing to bit 3 through bit 0 of the IOPINS1 (R20)

register. GPOUT7–GPOUT4 states are controlled by

writing to bit 3 through bit 0 of the IOPINS2 (R21) regis-

ter. GPOUT7–GPOUT0 logic levels are referenced to

the voltage on VL. As shown in Figure 13, reading the

state of a GPOUT7–GPOUT0 bit returns the state of the

internal register bit, not the actual pin state. This is use-

ful for doing read-modify-write operations to an output

pin (such as blinking an LED), since the load on the

output pin does not affect the register logic state.

GPX

GPX is a push-pull output with a 4-way multiplexer that

selects its output signal. The logic level on GPX is refer-

enced to VL. The SPI master writes to the GPXB and

GPXA bits of PINCTL (R17) register to select one of five

internal signals as depicted in Table 5.

Table 5. GPX Output State Due to GPXB

and GPXA Bits

GPXB

0

0

1

1

GPXA

0

1

0

1

*If SEPIRQ = 1.

GPX PIN OUTPUT

OPERATE (Default State)

VBUS_DET

BUSACT/INIRQ*

SOF

• OPERATE: This signal goes high when the

MAX3421E is able to operate after a power-up or

RES reset. OPERATE is active when the RES input

is high and the internal power-on-reset (POR) is

not asserted. OPERATE is the default GPX output.

• VBUS_DET: VBUS_DET is the VBCOMP comparator

output. This allows the user to directly monitor the

VBUS status.

• BUSACT: USB BUS activity signal (active high).

This signal is active whenever there is traffic on

the USB bus. The BUSACT signal is set whenever

a SYNC field is detected. BUSACT goes low during

bus reset or after 32-bit times of J-state.

GPOUT

WRITE

REGISTER BIT

GPOUT

PIN

GPOUT

READ

Figure 13. Behavior of Read and Write Operations on

GPOUT3–GPOUT0

FULL-SPEED

TIME FRAME

1ms

USB

PACKETS SOF

GPX

~50%

FULL-SPEED

TIME FRAME

1ms

SOF

SOF

Figure 14. GPX Output in SOF Mode

SPI

CONTROLLER

FDUPSPI = 1

SPI

CONTROLLER

MOSI

MISO

MAX3421E

MOSI

MISO

MAX3421E

FDUPSPI = 0 (DEFAULT)

Figure 15. MAX3421E SPI Data Pins for Full-Duplex (Top) and

Half-Duplex (Bottom) Operation

18

Maxim Integrated

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