AD5424 データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
一致するリスト
AD5424 Datasheet PDF : 32 Pages
| |||
AD5424/AD5433/AD5445
Parameter
Min
Output Capacitance
IOUT1
IOUT2
Digital Feedthrough
Analog THD
Digital THD
50 kHz fOUT
Output Noise Spectral Density
SFDR Performance (Wide Band)
Clock = 10 MHz
500 kHz fOUT
100 kHz fOUT
50 kHz fOUT
Clock = 25 MHz
500 kHz fOUT
100 kHz fOUT
50 kHz fOUT
SFDR Performance (Narrow Band)
Clock = 10 MHz
500 kHz fOUT
100 kHz fOUT
50 kHz fOUT
Clock = 25 MHz
500 kHz fOUT
100 kHz fOUT
50 kHz fOUT
Intermodulation Distortion
Clock = 10 MHz
f1 = 400 kHz, f2 = 500 kHz
f1 = 40 kHz, f2 = 50 kHz
Clock = 25 MHz
f1 = 400 kHz, f2 = 500 kHz
f1 = 40 kHz, f2 = 50 kHz
POWER REQUIREMENTS
Power Supply Range
2.5
IDD
Power Supply Sensitivity
1 Guaranteed by design, not subject to production test.
Typ Max
12 17
25 30
22 25
10 12
1
81
65
25
Unit
pF
pF
pF
pF
nV-s
dB
dB
nV√Hz
55
dB
63
dB
65
dB
50
dB
60
dB
62
dB
73
dB
80
dB
82
dB
70
dB
75
dB
80
dB
65
dB
72
dB
51
dB
65
dB
5.5
V
0.6
μA
0.4 5
μA
0.001
%/%
Conditions
All 0s loaded
All 1s loaded
All 0s loaded
All 1s loaded
Feedthrough to DAC output with CS high and
alternate loading of all 0s and all 1s
VREF = 3.5 V p-p, all 1s loaded, f = 100 kHz
Clock = 10 MHz, VREF = 3.5 V
@ 1 kHz
AD5445, VREF = 3.5 V
AD5445, VREF = 3.5 V
AD5445, VREF = 3.5 V
TA = 25°C, logic inputs = 0 V or VDD
Logic inputs = 0 V or VDD, T= −40°C to +125°C
ΔVDD = ±5%
Rev. B | Page 4 of 32
Share Link: 