74VHC244(2005) データシートの表示（PDF） - Fairchild Semiconductor
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74VHC244 Datasheet PDF : 8 Pages
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November 1992
Revised April 2005
74VHC244
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHC244 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation. The VHC244 is a non-inverting 3-STATE buffer hav-
ing two active-LOW output enables. These devices are
designed to be used as 3-STATE memory address drivers,
clock drivers, and bus oriented transmitter/receivers.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s High Speed: tPD 3.9ns (typ) at VCC 5V
s High noise immunity: VNIH VNIL 28% VCC (min)
s Power down protection is provided on all inputs
s Low noise: VOLP 0.6V (typ)
s Low power dissipation: ICC 4 PA (max) @ TA 25qC
s Pin and function compatible with 74HC244
Ordering Code:
Order Number Package Number
Package Description
74VHC244M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHC244SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC244MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC244N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Connection Diagram
IEEE/IEC
© 2005 Fairchild Semiconductor Corporation DS011522
www.fairchildsemi.com
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