V437464S24VXTG-75PC データシートの表示（PDF） - Mosel Vitelic, Corp
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V437464S24VXTG-75PC
Mosel Vitelic, Corp
V437464S24VXTG-75PC Datasheet PDF : 12 Pages
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MOSEL VITELIC
V437464S24V
Serial Presence Detect Information
A serial presence detect storage device –
E2PROM – is assembled onto the module. Informa-
tion about the module configuration, speed, etc. is
SPD-Table :
written into the E2PROM device during module pro-
duction using a serial presence detect protocol (I2C
synchronous 2-wire bus)
Byte Num-
ber
Function Described
SPD Entry Value
0
Number of SPD bytes
128
1
Total bytes in Serial PD
256
2
Memory Type
SDRAM
3
Number of Row Addresses (without BS bits)
13
4
Number of Column Addresses (for x8
10
SDRAM)
5
Number of DIMM Banks
2
6
Module Data Width
72
7
Module Data Width (continued)
0
8
Module Interface Levels
LVTTL
9
SDRAM Cycle Time at CL=3
7.5 ns/10.0 ns
10
SDRAM Access Time from Clock at CL=3
5.4 ns/6.0 ns
11
Dimm Config (Error Det/Corr.)
ECC
12
Refresh Rate/Type
Self-Refresh, 7.8µs
13
SDRAM width, Primary
x8
14
Error Checking SDRAM Data Width
n/a / x8
15
Minimum Clock Delay from Back to Back
Random Column Address
tccd = 1 CLK
16
Burst Length Supported
1, 2, 4, 8
17
Number of SDRAM Banks
4
18
Supported CAS Latencies
CL = 3, 2
19
CS Latencies
CS Latency = 0
20
WE Latencies
WL = 0
21
SDRAM DIMM Module Attributes
Non Buffered/Non Reg.
22
SDRAM Device Attributes: General
Vcc tol ± 10%
23
Minimum Clock Cycle Time at CAS Latency
7.5 ns/10.0 ns
=2
24
Maximum Data Access Time from Clock for
5.4 ns/6.0 ns
CL = 2
25
Minimum Clock Cycle Time at CL = 1
Not Supported
26
Maximum Data Access Time from Clock at
Not Supported
CL = 1
27
Minimum Row Precharge Time
15 ns /20 ns
-75PC
80
08
04
0D
0A
02
48
00
01
75
54
02
82
08
08
01
0F
04
06
01
01
00
0E
75
54
00
00
0F
Hex Value
-75
80
08
04
0D
0A
02
48
00
01
A0
60
02
82
08
08
01
0F
04
06
01
01
00
0E
A0
60
00
00
14
-10PC
80
08
04
0D
0A
02
48
00
01
A0
60
02
82
08
08
01
0F
04
06
01
01
00
0E
A0
60
00
00
14
V437464S24V Rev. 1.0 January 2002
4
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