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ZILOG
AC TIMING DIAGRAM
TCY
CLOCK
DSSET
/DS
PRELIMINARY
DSHOLD
Tr
Tf
CPW
EA(2:0)
EASET
Valid Address Out
EAHOLD
RD//WR
EXT(15:0)
RDHOLD
RDSET
Data In
Read Timing Diagram
CLOCK
WAIT
/DS
EA(2:0)
RD//WR
EXT(15:0)
TCY
WSET
WHOLD
Valid Address Out
Data In
Read Timing Diagram Using WAIT Pin
6
Z89390
CPS DC-9030-01
DC 9030-00