MT5C6401 データシートの表示（PDF） - Micron Technology
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MT5C6401 Datasheet PDF : 11 Pages
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OBSOLETE 8/31/94
MT5C6401
64K x 1 SRAM
WRITE CYCLE NO. 1 12
(Chip Enable Controlled)
tWC
ADDR
tAW
tAS
tCW
tAH
CE
,,, , tWP
,,,,, , , WE
tDS
tDH
, ,,, D
DATA VALID
Q
HIGH-Z
WRITE CYCLE NO. 2 7, 12
(Write Enable Controlled)
ADDR
,,,,,,,, ,,,,, CE
tAS
, WE
, ,,,,,, , D
, , , , Q
tWC
tAW
tCW
tWP
tHZWE
tAH
tDS
tDH
DATA VALID
tLZWE
HIGH-Z
,,,,,, ,,,, DON’TCARE
,UNDEFINED
MT5C6401
REV. 12/93
9
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1993, Micron Semiconductor, Inc.
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